In general, a Complimentary Metal Oxide Semiconductor (CMOS) image sensor circuit includes a focal plane array of pixels, each one of the pixels includes a photo-conversion device, e.g., a photogate, photoconductor, or photodiode having an associated charge accumulation region within a substrate for accumulating photo-generated charge. Each pixel may include a transistor for transferring charge from the charge accumulation region to a diffusion node and a transistor for resetting the diffusion node to a predetermined charge level prior to charge transference. The pixel may also include a source follower transistor for receiving and amplifying charge from the diffusion node and an access transistor for controlling the readout of the pixel contents from the source follower transistor. In some arrangements, the transfer transistor is omitted and the charge accumulation region is coupled with the diffusion node.
In a CMOS image sensor, the active elements of a pixel perform the necessary functions of: (1) photon to charge conversion; (2) accumulation of image charge; (3) transfer of charge to the diffusion node accompanied by charge amplification (where a transfer transistor is used); (4) resetting the diffusion node to a known state before the transfer of charge to it; (5) selection of a pixel for readout; and (6) output and amplification of a reset signal and a signal representing pixel charge from the diffusion node. The charge at the floating diffusion node is typically converted to a pixel output voltage by the source follower output transistor.
However the CMOS image sensor is susceptible to the generation of dark current that is generally attributed to leakage in the charge collection region of the pinned photodiode, which is strongly dependent on the doping implantation conditions of the CMOS image sensor. In addition, defects and trap sites inside or near the photodiode depletion region strongly influence the magnitude of dark current generated. In summary, dark current is a result of current generated from trap sites inside or near the photodiode depletion region, surface leakage at silicon/surface interface; band-to-band tunneling induced carrier generation as a result of high fields in the depletion region; junction leakage coming from the lateral sidewall of the photodiode; and leakage from isolation corners, for example, stress induced and trap assisted tunneling.
U.S. Patent Application Publication US 2005/0133825 A1, the contents of which are incorporated herein by reference as if set forth in its entirety, discusses methods and structures for reducing dark current in an image sensor by preventing unwanted electrons from being collected in the photosensitive regions of the pixels. In US 2005/0133825 A1, dark current is reduced by providing a deep n-type region having an n-type peripheral sidewall formed in a p-type substrate region underlying a pixel array region to separate the pixel array region from a peripheral circuitry region of the image sensor.
Dark current is but one of the inherent operational challenges in CMOS image sensors, as another area of focus is maximizing the fill factor as pixel size decreases. A significant portion of the pixel area is dedicated to the support transistors (amplifier, reset, and row select), which are relatively opaque to visible light photons and cannot be utilized for photon detection. The remaining area is utilized as the photosensitive part of the pixel. Because such a small portion of the photodiode is actually capable of absorbing photons to generate charge, the fill factor or aperture of the CMOS image sensor represents only portion of the total photodiode array surface area. Low fill factors can result in a significant loss in sensitivity and a corresponding reduction in signal-to-noise ratio, leading to a limited dynamic range. Fill factor ratios vary from device to device, but in general, they range from 30 to 80 percent of the pixel area in CMOS image sensors.
Compounding the reduced fill factor problem is the wavelength-dependent nature of photon absorption, a term referred to as the quantum efficiency of CMOS image sensors. Three primary mechanisms operate to hamper photon collection by the photosensitive area: absorption, reflection, and transmission. It is common that a majority of the photodiode area may be shielded by transistors and stacked or interleaved metallic bus lines, which are optically opaque and absorb or reflect a majority of the incident photons colliding with the structures. Optimizing quantum efficiency in these CMOS image sensors is an ongoing endeavor. Furthermore, when n-type substrates are used to reduce cross-talk, red quantum efficiency is reduced as a result of the thin collection depth of the n-tub or n-type substrate.
Still another area of focus in CMOS image sensors is the desired reduction of floating body effects when n-type substrates (such as an n-tub as disclosed in U.S. Patent Application Publication US 2005/0133825 A1) are implemented under the image sensor pixel's photosensor (e.g. photodiode). Floating body effects occur when the pixel is grounded only at the edge of the array, so the pixels in the center of the array exhibit an unstable behavior. Metal wiring can be added to ground the pixels, but the additional contact can reduce fill factor and the extra metal routing can block light and thus reduce quantum efficiency.
Therefore, what is needed in the art is an image sensor which exhibits substantial photon collection depth for the red pixels, increases the quantum efficiency, reduces floating body effects, and maintains the fill factor (pixel density).